Tower Semiconductor and Cadence Announce New Reference Flow for Advanced 5G Communications and Automotive IC Development
- Collaboration results in silicon-validated SP4T RF SOI switch reference flow using the Virtuoso Design Platform and integrated EM analysis
- Flow showcases advantages of a unified design environment for chip and package co-design and simulation
- Comprehensive flow includes custom IC design suite, EM solvers, and multiphysics analysis tools, providing a faster path to design closure
This new RF reference design flow leverages a comprehensive set of mixed-signal and RF design, simulation, system analysis, and signoff tools that are tuned for Tower’s CMOS, BiCMOS, SOI, and Silicon Germanium (SiGe) process technologies. Using the new offering, joint customers can accelerate RF, mmWave and high-performance analog designs, and increase signoff confidence.
“This unique RF and mmWave full-flow solution has been jointly validated on Tower’s CS18 RF SOI foundry process,” said KT Moore, vice president, product management in the
Tower’s RF and high-performance analog design enablement solutions, PDKs, and reference flows complement its best-in-class foundry wireless and wireline process technologies, including the CS18 and TPS65RS for RF-SOI and SBC18 for SiGe BiCMOS. RF and mmWave IC and package co-design has been a critical issue for Tower’s customers, and they are now armed with silicon-validated tools and flows. Joint customers can design differentiated ICs optimized for cost and performance.
“We are excited to announce the expansion of our design enablement capabilities, providing our customers with new competitive advantages,” said Mr.
As frequencies move higher, the need for accurately incorporating multiphysics effects grows. As such, the RF and mmWave PDKs available from Tower now incorporate the Cadence Celsius™ Thermal Solver, EMX® Planar 3D Solver and Clarity™ 3D Solver technologies to seamlessly account for electromagnetic (EM) and thermal integrity of the design. The multiphysics analysis products complement the existing Cadence toolset in use at Tower, including the Virtuoso environment, Spectre® Simulation Platform, Quantus™ Extraction Solution, integrated Litho Physical Analyzer, and Innovus™ Implementation System. For more information on the Cadence suite of chip, package, and multiphysics solutions, visit www.cadence.com/go/TowerReferenceFlow.
For more information about Tower Semiconductor’s foundry technology and design enablement offerings, please visit here.
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Source: Tower Semiconductor